AI Agent Autonomously Designs Complete RISC-V CPU in 12 Hours From Simple Spec
Key Takeaways
- ▸Verkor's Design Conductor AI agent designed a functional RISC-V CPU from a 219-word spec in 12 hours, versus the industry standard of 18-36 months with hundreds of engineers
- ▸VerCore achieved 1.48 GHz on 7nm, implemented autonomous optimizations including a Booth-Wallace multiplier, and demonstrated functional correctness in simulation
- ▸Design limitations include LLM reasoning gaps (treating event-driven Verilog as sequential code, overestimating pipeline changes), non-linear compute scaling with complexity, and reliance on academic process kits rather than production nodes
Summary
Verkor.io claims its agentic AI system, Design Conductor, has autonomously produced a complete RISC-V CPU core from a 219-word requirements document in just 12 hours—a dramatic acceleration compared to the industry standard of 18 to 36 months. The resulting processor, VerCore, is a five-stage pipelined in-order core that achieved 1.48 GHz on a 7nm process and scored 3,261 on the CoreMark benchmark. The system independently implemented optimizations like a fast Booth-Wallace multiplier and selected between one-cycle and two-cycle branch penalty designs after testing both variants.
While the achievement represents a significant milestone—the first fully autonomous design from specification to GDSII layout file—the researchers are transparent about limitations. VerCore remains relatively simple by industry standards, lacks caching and out-of-order execution, and has not been physically fabricated. The design was verified only through simulation using Spike, a reference RISC-V ISA simulator, and the ASAP7 academic process design kit rather than a production node. Verkor estimates that five to 10 human experts will still be required to guide the system toward production-ready chips, and computational requirements scale non-linearly with design complexity.
- Verkor plans to release VerCore's RTL source code and showcase an FPGA implementation at DAC, positioning this as a foundation for human-AI collaborative chip design
Editorial Opinion
This breakthrough demonstrates the transformative potential of AI agents in hardware design automation, compressing multi-year timelines into hours for autonomous end-to-end synthesis. However, the candid acknowledgment of LLM reasoning limitations—such as misunderstanding event-driven semantics and oversimplifying complex tradeoffs—highlights that autonomous AI design remains complementary to, not a replacement for, human expertise. The non-linear scaling challenge suggests this acceleration benefit may be most practical for relatively simple designs rather than cutting-edge processors, positioning AI as a powerful accelerator for domain exploration and rapid prototyping rather than a complete replacement of human chip design teams.
